What does "PHY" refer to? - Electrical Engineering Stack Exchange
Oct 20, 2021 · a PHY is a type of Ethernet physical layer (eg. 100BASE-TX, 10BASE-T) a PHY is an Ethernet transceiver IC (eg. an IC that converts 100BASE-TX to MII/RMII) a PHY is a physical layer …
what is the difference between PHY and MAC chip
Jul 11, 2013 · what is the difference between PHY and MAC chip Ask Question Asked 12 years, 5 months ago Modified 12 years, 5 months ago
Connecting a PHY to another PHY on a same board
Aug 14, 2022 · Generally, if I'm connecting a PHY to RJ45 connector, I would add center tap capacitors and Bob-Smith termination like below. But if I am connecting a PHY to another PHY, do I still need …
microcontroller - Why are Ethernet MAC and PHY separate? - Electrical ...
Dec 16, 2022 · The PHY also dissipates a significant amount of power all by itself. And sometimes different media require different PHYs, but the MAC can be the same. For all of these reasons, it …
Ethernet switch IC ports in MAC and PHY mode
Nov 8, 2021 · 1/ for port 2 and 6, the phy is external. Unfortunately though not all phy information is present on an RGMII/GMII and this is sent over MDIO/MDC. The switch needs to know you have a …
Why do Ethernet PHY magnetics have a center tap?
May 23, 2023 · I've a question with the Ethernet PHY connection to the RJ45 connector. With either discrete or integrated magnetics, either with voltage mode PHY or current mode PHY, what is the …
In USB, what is the difference between a PHY and a transceiver?
Mar 26, 2013 · A Phy is similar to a transceiver in that there is usually different signal standards on "both sides of the chip". With Ethernet it is MII/GMII/etc on one side and, well, Ethernet on the other.
The SERDES/transceiver design inside the Ethernet MAC controller
Nov 15, 2019 · The 1st and 2nd figures are normal application which transmits the data through copper media with coded information (through PCS/PMD/PMA inside the PHY chip). The interface between …
stm32 - How to implement OTG FS hardware using embedded PHY on ...
Aug 23, 2025 · The OTG FS for STM32F105/107 (which does not support OTG HS 4) has an internal PHY 5 and a pull-up resistor; thus, I attempted to use section 3.3 of AN4879. Regarding the figure …
MIPI C-PHY Signal Routing - Electrical Engineering Stack Exchange
Sep 14, 2021 · I've been looking for a good, definitive reference example for MIPI C-PHY signal routing and have come up short. Bear in mind that C-PHY uses a set of 3 signals per lane, with multi-level …